HW/SW Co-design of an IEEE 802.11a/g Receiver on Xilinx Zynq SoC using High-Level Synthesis

Jens Rettkowski, Diana Göhringer, S. Nouri, J. Nurmi

International Symposium on Highly-Efficient Accelerators Reconfigurable Technologies (HEART), Bochum, June 7-9, 2017.

tags: co-design, HW, soc, SW, Xilinx, Zynq